Tehnička dokumentacija
Tehnički podaci
Mounting Type
Surface Mount
Package Type
QFN
Pin Count
24
Dimensions
4 x 4 x 0.85mm
Length
4mm
Height
0.85mm
Maximum Operating Supply Voltage
3.63 V
Width
4mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
1.71 V
Maximum Output Frequency
200MHz
Zemlja podrijetla
Taiwan, Province Of China
Detalji o proizvodu
Si5334/35/38 Clock Generators, Silicon Labs
The Silicon Labs Si5334/35/38 are differential and LVCMOS clock generators which provide any rate, any output frequency synthesis. They enable a single device to replace multiple crystal oscillators and fixed-frequency clock generators.
Any combination of output frequencies can be generated with exactly 0 ppm error. Independent signal format and VDDO options provide integrated level translation, supporting LVPECL/LVDS/HCSL/LVCMOS clock generation up to 712.5 MHz with sub 1 ps RMS phase jitter.
Informacije o stanju skladišta trenutno nisu dostupne.
Provjerite ponovno kasnije.
€ 27,50
komadno (isporučuje se u traci) (bez PDV-a)
€ 32,18
komadno (isporučuje se u traci) (s PDV-om)
1
€ 27,50
komadno (isporučuje se u traci) (bez PDV-a)
€ 32,18
komadno (isporučuje se u traci) (s PDV-om)
1
Kupujte na veliko
količina | Jedinična cijena |
---|---|
1 - 24 | € 27,50 |
25+ | € 27,00 |
Tehnička dokumentacija
Tehnički podaci
Mounting Type
Surface Mount
Package Type
QFN
Pin Count
24
Dimensions
4 x 4 x 0.85mm
Length
4mm
Height
0.85mm
Maximum Operating Supply Voltage
3.63 V
Width
4mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
1.71 V
Maximum Output Frequency
200MHz
Zemlja podrijetla
Taiwan, Province Of China
Detalji o proizvodu
Si5334/35/38 Clock Generators, Silicon Labs
The Silicon Labs Si5334/35/38 are differential and LVCMOS clock generators which provide any rate, any output frequency synthesis. They enable a single device to replace multiple crystal oscillators and fixed-frequency clock generators.
Any combination of output frequencies can be generated with exactly 0 ppm error. Independent signal format and VDDO options provide integrated level translation, supporting LVPECL/LVDS/HCSL/LVCMOS clock generation up to 712.5 MHz with sub 1 ps RMS phase jitter.