Tehnička dokumentacija
Tehnički podaci
Proizvođač
MicrochipProduct Type
Ethernet Switch IC
Sub Type
Switch
Communication Mode
Full Duplex/Half Duplex
Loopback Mode
Internal
Interface Type
RGMII
Number of Ports
7
Standard Supported
IEEE 802.3
Mount Type
Surface
Package Type
TQFP
Pin Count
128
Maximum Supply Voltage
3.3V
Minimum Operating Temperature
0°C
Maximum Operating Temperature
70°C
Minimum Supply Voltage
1.8V
Height
1.2mm
Length
16mm
Standards/Approvals
No
Width
16mm
Supply Current
750mA
Automotive Standard
No
Detalji o proizvodu
The KSZ9897 is a fully integrated layer 2, managed, seven-port gigabit Ethernet switch with numerous Advanced features. Five of the seven ports incorporate 10/100/1000 Mbps PHYs. The other two ports have interfaces that can be configured as SGMII, RGMII, MII or RMII. Either of these may connect directly to a host processor or to an external PHY. Full register access is available by SPI or I2C interfaces, and by optional in-band management via any of the data ports.
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PRIDRUŽITE SE BESPLATNO
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Informacije o stanju skladišta trenutno nisu dostupne.
€ 1.312,20
€ 14,58 Each (In a Tray of 90) (bez PDV-a)
90
€ 1.312,20
€ 14,58 Each (In a Tray of 90) (bez PDV-a)
Informacije o stanju skladišta trenutno nisu dostupne.
90
Zamisliti. Stvoriti. Surađivati
PRIDRUŽITE SE BESPLATNO
Bez skrivenih naknada!
Tehnička dokumentacija
Tehnički podaci
Proizvođač
MicrochipProduct Type
Ethernet Switch IC
Sub Type
Switch
Communication Mode
Full Duplex/Half Duplex
Loopback Mode
Internal
Interface Type
RGMII
Number of Ports
7
Standard Supported
IEEE 802.3
Mount Type
Surface
Package Type
TQFP
Pin Count
128
Maximum Supply Voltage
3.3V
Minimum Operating Temperature
0°C
Maximum Operating Temperature
70°C
Minimum Supply Voltage
1.8V
Height
1.2mm
Length
16mm
Standards/Approvals
No
Width
16mm
Supply Current
750mA
Automotive Standard
No
Detalji o proizvodu
The KSZ9897 is a fully integrated layer 2, managed, seven-port gigabit Ethernet switch with numerous Advanced features. Five of the seven ports incorporate 10/100/1000 Mbps PHYs. The other two ports have interfaces that can be configured as SGMII, RGMII, MII or RMII. Either of these may connect directly to a host processor or to an external PHY. Full register access is available by SPI or I2C interfaces, and by optional in-band management via any of the data ports.
Zamisliti. Stvoriti. Surađivati
PRIDRUŽITE SE BESPLATNO
Bez skrivenih naknada!
